Types conversions in VHDL FUNCTIONS / Castings
	Bit_vector	Integer	Std_logic_vector	Unsigned	Signed
Bit_vector	-	***	TO_STDLOGICVECTOR	**	**
Integer	***	-	**	TO_UNSIGNED*	TO_SIGNED*
Std_logic_vector	TO_BITVECTOR	**	-	unsigned	signed
Unsigned	**	TO_INTEGER	std_logic_vector	-	signed
Signed	**	TO_INTEGER	std_logic_vector	unsigned	-
* Requires length ** Requires two conversions *** Requires three conversions
Get sentence: From: Bit_vector Integer Std_logic_vector Unsigned Signed To: Bit_vector Integer Std_logic_vector Unsigned Signed
Requires to include lines: library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.NUMERIC_STD.ALL;